CAT310
TYPICAL CHARACTERISTICS
( VCC = 5 V, VBATT = 14 V, T AMB = 25 ° C, unless otherwise specified.)
14
12
10
20
15
8
10
6
4
2
125 ° C
85 ° C
25 ° C
5
0
10
11
12
13
14
? 40 ° C
15
16
0
? 50
? 25
0
25
50
75
100
125
24
22
OUTPUT PIN BIAS VOLTAGE (V)
Figure 9. Output Channel Leakage vs. Bias
Voltage
3.0
2.5
TEMPERATURE ( ° C)
Figure 10. Quiescent Current vs. Temperature
2.0
20
1.5
18
16
1.0
0.5
14
? 50
? 25
0
25
50
75
100
125
0
? 50
? 25
0
25
50
75
100
125
TEMPERATURE ( ° C)
Figure 11. VBATT Overvoltage Detection vs.
Temperature
Functional Description
The CAT310 implements a 10 ? bit serial ? in shift register
for storing the setting of the ten outputs. Serial input data
SIN are clocked into the shift register on the rising edge of
the clock. At the 10 th clock pulse, the first data bit entered
is outputted from the shift register to SOUT. The following
clock pulses will output the following data bits onto SOUT.
The output data pattern replicates the input data stream with
a delay of ten clock pulses.
The 10 ? bit data pattern present in the shift register is
stored in the 10 ? bit data latch when the latch signal XLAT
Serial to Parallel Shift Register
TEMPERATURE ( ° C)
Figure 12. VCC Undervoltage Lockout vs.
Temperature
is logic high. When XLAT transitions to logic low, data are
latched and stay unchanged for as long as XLAT remains
low. The last serial input data corresponds to OUT0. The
serial input data that was received 10 clock pulse ago is
stored in OUT9. When the BLANK input is logic high, all
the output switches are in the off state. If the BLANK input
is low, the 10 ? bit data latches control the 10 output switches.
A data bit value of zero keeps the switch off. A data bit value
of one keeps the switch on.
CLK →
SIN →
Data Latch
XLAT →
Bit
0
LED
OUT0
Bit
1
LED
OUT1
Bit
2
LED
OUT2
Bit
3
LED
OUT3
Bit
4
LED
OUT4
Bit
5
LED
OUT5
Bit
6
LED
OUT6
Bit
7
LED
OUT7
Bit
8
LED
OUT8
Bit
9
LED
OUT9
→ SOUT
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